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(parent: 942a6f1) | patch
amd iommu: Automatic page coalescing
authorWei Wang <wei.wang2@amd.com>
Tue, 16 Aug 2011 14:03:11 +0000 (15:03 +0100)
committerWei Wang <wei.wang2@amd.com>
Tue, 16 Aug 2011 14:03:11 +0000 (15:03 +0100)
commitd8f18bf62ed7fbf714c304e63ae78db958fc082e
treed9a56e48cf68160beba7d4b46c9a039b43ea143btree | snapshot
parent942a6f1376d8f352b46cb7964aeeaa37fcb24fd8commit | diff
amd iommu: Automatic page coalescing

This patch implements automatic page coalescing when separated io page
table is used. It uses ignore bits in iommu pde to cache how many
entries lower next page level are suitable for coalescing and then
builds a super page entry when all lower entries are contiguous.  This
patch has been tested OK for weeks mainly with graphic devices and 3D
mark vantage.

Signed-off-by: Wei Wang <wei.wang2@amd.com>
xen/drivers/passthrough/amd/iommu_map.c diff | blob | history
xen/drivers/passthrough/amd/pci_amd_iommu.c diff | blob | history
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